AES CCMP Algorithm with N-Way Interleaved Chiper Block Chaining

  • Zadia Codabux-Rossan
  • M. Razvi Doomun
Keywords: IEEE 802.11i security, AES-CCMP, Optimization, Interleaved Chiper Block Chaining

Abstract

Nowadays, the increased use of battery-powered mobile appliances and the urge to access time-sensitive data  anytime anywhere has fuelled a high demand for wireless networks. However, wireless networks are susceptible  to intrusion and security problems. There is an inherent need to secure the wireless data communication to ensure  the confidentiality, authenticity, integrity and non repudiation of the data being exchanged. On the other  hand, the computation and the resultant energy consumption to achieve sufficient security can be high. Encryption  algorithms are generally computationally intensive, and consume a significant amount of computing  resources (such as CPU time, memory, and battery power). Considering the limited resources on wireless  devices, it is crucial that security protocols be implemented efficiently. This manuscript focuses on how energy  consumption is impacted by the use of unoptimised AES-CCMP algorithms and proposes an optimized AES CCMP algorithm using 2-way interleaving that does not compromise the security of wireless communication sessions.  There is also analysis of the performance of AES (a.k.a. Rijndael) in its AES–CCMP implementation. The 2-way  interleaving technique is an optimization of the CBC-MAC that is investigated using two performance metrics  (namely encryption time and throughput).

Keywords: IEEE 802.11i security, AES-CCMP, Optimization, Interleaved Cipher Block Chaining

Published
2016-03-01
Section
Articles

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eISSN: 1694-0342